Drop the BOM costs with PLL-based devices

    April 12, 2007
    ON Semiconductor expanded its high-performance clock-generation family with its PureEdge series of phase-locked-loop (PLL)- based devices. The first PureEdge devices to arrive are the NB3N3001 and NB3N3011. The devices are 3.3V clock

    ON Semiconductor expanded its high-performance clock-generation family with its PureEdge series of phase-locked-loop (PLL)- based devices. The first PureEdge devices to arrive are the NB3N3001 and NB3N3011. The devices are 3.3V clock generators, which feature LVPECL differential outputs.

    By creating LVPECL, subpicosecond jitter-quality clocks at 100, 106.25, and 212.5 MHz, these devices will find homes in FibreChannel and Serial ATA applications. The architecture provides improved design flexibility and reduced cost when compared to standard crystal oscillators, claims the company.

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