Arm’s Chiplet System Architecture (CSA) is an ambitious project to help streamline the development of chiplet-based solutions. I talked with Eddie Ramirez, Vice President of Marketing at Arm, to get the lowdown on CSA (watch the video above).
Though the CSA Specification is still new, dozens of companies have signed on to utilize the specification. It will help in the construction of more complex chiplet-based solutions (Fig. 1). These advanced chip solutions are in high demand for various applications, from handling artificial-intelligence (AI) chores in the data center to providing the computational support needed for self-driving cars.
The details continue to be worked out, but it builds on Arm’s components like the Arm Neoverse Compute Subsystem (CSS) and, of course, Advanced Microcontroller Bus Architecture (AMBA), Arm’s standard for connecting functional blocks.
AMBA has been used for interconnects on monolithic die for a long time. The AMBA specification includes AMBA Coherent Hub Interface (CHI) and AXI. CHI Chip to Chip (C2C) is an extension that targets chiplets (Fig. 2). CHI provides a full cache-coherency model.
The CHI protocol has been around for a decade with enhancements along the way. It provides features like atomic and exclusive transactions, Distributed Virtual Memory (DVM) management, and realm management. CHI has parity protection plus support for write zero, data elision, and copy-at-home for reducing data transport.
CSA is meant for complex designs (Fig. 3), leveraging a hub-based approach with clear definitions of standard functional interfaces like memory controllers. The specification details interfaces and functional descriptions for all of the major components from direct memory access (DMA) to interrupts to memory and cache control.
AMBA and CHI are open standards. While Arm is building their IP around these, it’s not just a specification that requires Arm IP. Processing cores could easily incorporate other architectures like RISC-V.
One might think that standards like Universal Chiplet Interconnect Express (UCIe) may not be needed now, but a closer look at CSA reveals it’s built on other standards like UCIe. CSA is another step toward standardization of chiplet-based designs that should lead to more chiplets and faster chip creation.
