• Resources
  • Directory
  • Webinars
  • CAD Models
  • Video
  • Blogs
  • Advertise

    • Highlights

    44mythspromo
    EDA

    44 Myths About Chip Verification eBook (Download)

    Many misconceptions have emerged about chip simulation and verification tools and techniques. Download this eBook, which collects together four of our most popular 11 Myths articles...
    Tony Vitolo/Electronic Design
    Holiday gifts for the analog-focused engineer
    Analog

    Suggested Gifts for Electronics Nerds of All Ages

    Make gift-giving a breeze with these gift ideas for that engineer, kid, Maker, electronics hobbyist, or geek who seems to have everything—including socks and sweaters.
    ID 105492920 © Feblacal | Dreamstime.com
    CAD modeling
    EDA

    Over 3,500 New CAD Models of Interconnect Solutions Arrive to Help Speed Design

    SnapMagic and Harwin teamed up to bring a vast array of downloadable CAD models, PCB footprints, and component libraries to engineers.
    ID 2725496 © Brian T. Young | Dreamstime.com
    Learning about SPICE modeling
    Analog

    Modeling on Mondays: SPICE Modeling of Common Active Devices—An Overview (Part 1)

    Engineering is all about choosing the best compromise—both for a SPICE model that provides reasonable fidelity and for the tools enabling that model to be employed.
    onsemi
    Wurth's passive components database added to onsemi's power-loss model generator
    Power Supply

    Collaboration Advances High-Accuracy Virtual Design of Power Apps

    A power-loss model generator was updated with passive components to more accurately model designs and accelerate time-to-market.
    Dreamstime_mauriceyom98_321540663
    Enhancing FPGA programmability
    EDA

    Adding Soft-Core RISC-V to FPGAs Improves Programmability

    FPGAs can become more programmable by adding a soft-core RISC-V processor. Bluespec’s Loren Hobbs discusses how to make it happen.

    Recommended

    Dashark | Dreamstime.com
    Ed Verification Promo dashark Dreamstime Wafer Stock Promo 6345bfb2a48ef

    Addressing Chip Verification Challenges

    Integrated circuits go through detailed verification before ever making a real chip, allowing developers to be confident that the chip will work once it's produced.
    Rusian Gilyazov | Dreamstime.com
    Pcb Ed Promo Electronic Hardware Ruslan Gilyazov Dreamstime L 114824249 612e53db98b31

    PCB Tools and Technology

    Check out the latest articles covering printed circuit board technology, methodologies, and development tools.
    Dreamstime_chormail_333795837
    dreamstime_chormail_333795837_promo
    Inside Electronics

    All About NoCs

    A network-on-chip is an indispensable part of a system-on-chip. Editor Bill Wong talks with Arteris’ Andy Nightingale about the intricacies of NoC technology.
    What’s the Difference Between Soft NoC Tiling and Hard Tiling?
    EDA

    What’s the Difference Between Soft NoC Tiling and Hard Tiling?

    Arteris’s FlexNoC supports soft tiling that’s targeted at AI and multicore chips.
    ID 22286147 © Piotr Adamowicz | Dreamstime.com
    syntaxerror_dreamstime_l_22286147
    EDA

    The 7 Habits of Highly Successful SPICE Designers

    SPICE veteran Mike Engelhardt provides sage insight on best practices for drawing schematics.
    ID 94875025 © Danciaba | Dreamstime.com
    riscv_architecture_promo_id_94875025__danciaba__dr
    TechXchange

    Examining the RISC-V Architecture

    This TechXchange delves into the architecture and design aspect of RISC-V