Addressing Chip Verification Challenges

The intent behind the new Questa Verification IQ platform is to help speed up the chip design process.

Managing challenges and risks that accompany a complex SoC design with FPGA prototyping and verification is critical in reducing or eliminating product delays and associated costs...

The new AI-powered Verisium platform from Cadence helps chipmakers identify problem areas in designs faster.

Today’s high-performance, power-hungry applications require a new approach to power verification. Emulating power pre-silicon will save weeks of simulation experimentation, delivering...

Creation of a specification for a semiconductor can be time-consuming and costly, especially if the project marches on with continued refinements. Automating the process is the...

Verification expert Dr. Lauro Rizzatti debunks the myths surrounding the two tool classes of HAV platforms—hardware emulators and FPGA prototypes.

A transformational change in the design and verification of electronics for autonomous vehicles will create a competitive advantage for automotive OEMs.

Designing with a high-speed interface like JESD204B always brings new challenges. This article discusses the specification, reviews the tests needed to validate JESD204B devices...

To a savvy chip design verification engineer, VIP is much more than a catchy acronym. Designers understand that verification intellectual property is a mainstay of the verification...

Formal verification is used by almost every chip development and verification group, though myths about it persist and may deter engineers who could benefit from its value.

FastSPICE offers more speed and the ability to simulate larger circuits than SPICE, but it has limitations, opening the door to the emerging GigaSpice simulation alternative. ...

Today's coverage technology exists today to create scenario models; automatically generate coverage goals; automatically generate test cases to hit those goals; and combine...

Automating the handwritten C tests that run on the SoC’s embedded processors will increase team productivity and foster reuse throughout the project.