Add Programmable Logic IP To Your ASICs Or ASSPs

April 2, 2001
ASIC designers can obtain programmable logic's reconfigurability. Adaptive Silicon's RAM-based reprogrammable logic IP for ASICs, the MSA2500, has up to 25,000 ASIC gates for flexible designs. Typical logic speeds are about 50 to 100...

ASIC designers can obtain programmable logic's reconfigurability. Adaptive Silicon's RAM-based reprogrammable logic IP for ASICs, the MSA2500, has up to 25,000 ASIC gates for flexible designs. Typical logic speeds are about 50 to 100 MHz.

In the MSA2500's first level, the core multiscale array (MSA) is implemented as hard IP. The second level consists of an application circuit interface (ACI) and programmable logic core (PLC) control, supplemented with a wrapper in soft IP, typically synthesized with external logic.

A hierarchy of function arrays, the MSA is integrated with multilevel bus interconnects on an underlying programmable RAM base. The base specifies the arrays' connections and logic configurations. It can be used as a group of memory elements as well.

The MSA2500's basic block is the quad block (QB), a 4-by-4 array of function cells (FCs). A hex block (HB), the next layer, holds 16 QBs. The MSA is an array of multiple HBs with vertical and horizontal global routing. A 4-by-4 array, this HB supports up to 512 I/O ports or logic connections to external logic.

An FC can be configured to serve as a 1-bit ALU or a 3-input, 1-output LUT. Four stacked FCs form a 4-bit ALU supported by its own ALU controller. This controller sits on top of the ALU stack and provides carry-look-ahead logic for larger arithmetic functions.

Four 4-bit ALUs make up a QB of 16 FCs. This block can be configured as an array of 4-bit ALUs (four slices). Or, the slices can be combined to make a wider ALU. Alternatively, the 4-bit slices can be configured as logic elements, such as a five-variable logic block, an 8:1 multiplexer, and a 4:1 multiplexer with gating.

The MSA2500 is implemented in a 0.18-µm LSI process. Licensing fees start at $0.018 per HB, with a $50,000 minimum. Millennium PLC EDA software to implement the MSA PLC integrates with existing SoC and ASIC software and their design flows. A one-year, one-user license costs $50,000.

Adaptive Silicon, 985 University Ave, #31, Los Gatos, CA 95032; (408) 335-2700; www.adaptivesilicon.com.

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