What’s next for programmable logic?

May 4, 2012
Is the future of programmable logic convergence with other devices? And if it is, how will they be programmed?

I was at the Globalpress Summit last week in Santa Cruz, California listening to presentations by some of the large FPGA vendors. They each had their own view of what the future holds for programmable logic.

Jeff Waters, Senior VP and GM for the Industrial & Computing Division at Altera gave an interesting presentation in which he said that the next phase of big growth for the programmable logic market is silicon convergence. He spoke about convergence between general processors (microprocessors and DSPs) and FPGAs on one hand, and between  FPGAs and application specific ICs (ASSPs and ASICs) on the other. General processors are very flexible, whereas ASICs are very efficient. A compromise may be reached by embedding the best of both worlds onto the same chip.

Waters described integrating a hardwired microprocessor and DSP cores onto an FPGA, then boosting efficiency by adding elements of application-specific IP, all linked together with a programmable fabric. He calls this hybrid device a ‘mixed system fabric’.

OpenCL is a key enabler for Altera’s vision. This open standard allows you to compile a C program and run it on an FPGA (or graphics processing unit, or microprocessor, or DSP, according to Waters). This means you can take an existing algorithm, quickly recompile it, and run it on an FPGA and see how it compares in terms of power and performance. Interestingly, it enables software guys to implement things in hardware, where they couldn’t before as they needed to be RTL-savvy.

Meanwhile, Xilinx’s vision of the future also involves convergence, but taking a slightly different route. In their view of the future, all-programmable systems dominate. The company’s Victor Peng, Senior VP for the programmable platforms group, painted a picture of a multi-die 3D IC which is both software and hardware programmable, even the analogue/mixed-signal parts. He pointed out that Xilinx already has products with programmable ADCs as well as 3DICs that use its stacked silicon interconnect technology, stressing that they are not just proof of concepts, they are already with customers.

With this in mind, Xilinx has developed a platform for programming these all-programmable devices of the future, software and hardware, from one integrated development environment. It’s called Vivado, and it is intended to be used to work at system-level for the next 10 years of new generations of technology. They have built it from the ground up to get rid of system integration bottlenecks, he said.

Peng’s view is that OpenCL, which started with GPUs in the early 2000s, is still very GPU-centric. He did concede that the consortium now has more non-GPU vendors participating, but still thinks it will  be a while before it fully takes off beyond certain segments.

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