This video is part of the TechXchange: AI at the Edge.
Computing on the edge almost always requires low-power operation. Running artificial-intelligence/machine-learning (AI/ML) code makes system design more challenging, but AI/ML hardware acceleration helps facilitate the process. This is where Femtosense has targeted its new SPU-001 (see figure). I talked with Sam Fok, CEO and Founder of Femtosense, about the company's new AI coprocessor that's designed for advanced audio processing (see the video above).
The SPU-001 handles real-time speech enhancement while consuming under 1 mW. It can implement an always-listening keyword detection using less than 100 mW, translating to continuous battery operation for more than two years. The chip also manages chores like neural beamforming, scene identification, and anomaly detection.
The SPU-001 fits into a 4- × 4-mm QFN package and uses an SPI interface to work with a host processor. It includes 1 MB of SRAM to support the models and weights. However, through its sparsity support, the device improves memory utilization by a factor of 100. This is accomplished by supporting sparse weights and sparse activations. Sparse weights is done by only storing weights that matter to the model. Sparse activations skips computations where the output of a neuron is zero.
The Femtosense SDK supports models from PyTorch, Jax, and TensorFlow. The tools also can be used to simulate a system, providing details about energy use, processor latency, and memory footprint.
Check out more videos and articles in the TechXchange: AI at the Edge.