High-Performance Clock Buffers Yield Noise-Immune Clock Signals

Nov. 29, 2004

Next-generation unbuffered memory modules have a new weapon in their arsenal: Zero-Buffer DDR (ZB-DDR) technology. Using discreet zero-delay clock buffers, patent-pending ZB-DDR combines the robustness of server class memory with the low latency of unbuffered modules for better data integrity, lower noise, and lower susceptibility to interference over a wider frequency spectrum. Yet the technology remains fully compatible with all current motherboards.

ZB-DDR can generate loss-less memory clock signals at the module level—with a clock buffer delay of 50 ps or less—that aren't subject to the impact of noise found in a distributed clock tree. To achieve that, ZB-DDR uses the Inphi INCU 877 clock buffers with a custom-developed pc-board matched to the clock buffer's impedance.

Developed by the OCZ Technology Group and Inphi Corp., the modules will be available in the first quarter of 2005. Module pricing will be determined based on memory-chip pricing in the first quarter.

OCZ Technology Groupwww.ocztechnology.com Inphi Corp.www.inphi-corp.com

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.