Stacked Chip-Scale Package Boosts Memory Densities

May 1, 1999

Intel's Stacked-CSP package vertically mounts flash memory and SRAM in a single package. The packaging technique, combined with the company's Flash Data Integrator (FDI) software that integrates the functions of EEPROM, brings three memory functionalities together. The result is savings in cost, weight and board space in the wireless market. The 8 mm x 10 mm stacked package is based on a common I-pinout stack of flash and SRAM die. Initial offerings in the package include 16 Mbits of flash with 2 Mbits of SRAM and 32 Mbits of flash with 4 Mbits of SRAM. The FDI software manages incoming data, as well as operating system instructions, in a single flash device, enabling equipment manufacturers to add the latest performance and system security features without adding development time and cost. Flash devices in the new package are the firm's Advanced+ Boot Block types.

Sponsored Recommendations

The Importance of PCB Design in Consumer Products

April 25, 2024
Explore the importance of PCB design and how Fusion 360 can help your team react to evolving consumer demands.

PCB Design Mastery for Assembly & Fabrication

April 25, 2024
This guide explores PCB circuit board design, focusing on both Design For Assembly (DFA) and Design For Fabrication (DFab) perspectives.

What is Design Rule Checking in PCBs?

April 25, 2024
Explore the importance of Design Rule Checking (DRC) in manufacturing and how Autodesk Fusion 360 enhances the process.

Unlocking the Power of IoT Integration for Elevated PCB Designs

April 25, 2024
What does it take to add IoT into your product? What advantages does IoT have in PCB related projects? Read to find answers to your IoT design questions.

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!