Stacked Chip-Scale Package Boosts Memory Densities

May 1, 1999

Intel's Stacked-CSP package vertically mounts flash memory and SRAM in a single package. The packaging technique, combined with the company's Flash Data Integrator (FDI) software that integrates the functions of EEPROM, brings three memory functionalities together. The result is savings in cost, weight and board space in the wireless market. The 8 mm x 10 mm stacked package is based on a common I-pinout stack of flash and SRAM die. Initial offerings in the package include 16 Mbits of flash with 2 Mbits of SRAM and 32 Mbits of flash with 4 Mbits of SRAM. The FDI software manages incoming data, as well as operating system instructions, in a single flash device, enabling equipment manufacturers to add the latest performance and system security features without adding development time and cost. Flash devices in the new package are the firm's Advanced+ Boot Block types.

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