With dimensions of just 1.6 x 1.2 x 0.55 mm, ESV packaging is said to offer the smallest and thinnest five-pin housing yet developed for single-gate CMOS logic. The new package’s footprint is up to 40% smaller than that for the existing smallest single-gate logic housing- namely, the firm’s USV package, which has a 2.0 x 1.25 x 0.9-mm size. The new single-gate CMOS logic packaging allows designers to cram more components and/or save space on boards used in notebooks, PDAs, wireless and cellular products, and numerous other electronic products. The tiny ESV package is currently offered in the firm's LCX single-gate logic family. Sample and production quantities are available.
Company: TOSHIBA AMERICA ELECTRONIC COMPONENTS INC. (TAEC)
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