Micro Memory Makes FPGAs Manageable

Feb. 12, 2007

Micro Memory offers the Othello MM-1650, based on a pair of 2VP70 chips, each with two embedded PowerPC processors. The board has a pair of XMC/PMC sites, one for each chip, and features 14 independent memory arrays.

William G. Wong

Micro Memory has been cranking out systems that make FPGA work easier for quite a while now. Their preconfigured FPGA CoSine system (Digital ICs/DSP: FPGA-Based DSP Offload Engine Accelerates Data Movement, ED Online #10390) alleviates many design chores for developers, allowing them to concentrate on their data processing logic.

The Othello MM-1650 (see the Figure) is one example of Micro Memory's hardware based on a pair of 2VP70 chips, each with two embedded PowerPC processors. The 6U VPX board has a pair of XMC/PMC sites, one for each chip. There are 14 independent memory arrays on the board. Connectivity is provided via Serial RapidIO to the backplane. It is available in air- and conduction-cooled versions.

For more information, visit Micro Memory.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.

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