Micro Memory Makes FPGAs Manageable

Feb. 12, 2007
Micro Memory offers the Othello MM-1650, based on a pair of 2VP70 chips, each with two embedded PowerPC processors. The board has a pair of XMC/PMC sites, one for each chip, and features 14 independent memory arrays.

Micro Memory has been cranking out systems that make FPGA work easier for quite a while now. Their preconfigured FPGA CoSine system (Digital ICs/DSP: FPGA-Based DSP Offload Engine Accelerates Data Movement, ED Online #10390) alleviates many design chores for developers, allowing them to concentrate on their data processing logic.

The Othello MM-1650 (see the Figure) is one example of Micro Memory's hardware based on a pair of 2VP70 chips, each with two embedded PowerPC processors. The 6U VPX board has a pair of XMC/PMC sites, one for each chip. There are 14 independent memory arrays on the board. Connectivity is provided via Serial RapidIO to the backplane. It is available in air- and conduction-cooled versions.

For more information, visit Micro Memory.

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