EiED Online>> Stacking PCI Express

Aug. 25, 2004
Volume 2004, Number 9

PCI Express, USB, Ethernet and Serial ATA (SATA) are the wave of the future. These hierarchical, point-to-point interconnects work well with on-board and slot oriented architectures. The stacking-style architecture employed with PC/104 is more of a challenge but one I think is attainable and desirable. The compact and incremental nature of PC/104 and similar architectures has proven beneficial in a wide range of embedded applications.

Before you go hunting for a new specification, be aware that this little soapbox rant is mine although it was inspired by a discussion on how to integrate USB into a stacking architecture. I have not worked out all the details, but I'm sure that some interesting designs may come out of this if developers demand the performance and flexibility of technologies like PCI Express. The reason for thinking about this now is in anticipation of a flood of PCI Express, USB and Ethernet peripherals available now and in the near future.

The Design The stacking design (see the figure) is physically similar to PC/104 but the connectors employed are not the through-the-hole style employed by PC/104. Those were designed to implement a passive, parallel bus. In this design, a pair of surface mount connectors are used. This allows a hub to be interposed between boards providing connections to on-board peripherals. A board not needing access to a particular interconnect could simply pass the signals from one connector to another.

The bottom board in the stack would have to be a single board computer (SBC) that provides the root interface for supported interconnects. It would typically provide a connector to the outside world for interconnects like an Ethernet RJ-45.

A typical interconnect complement might include 1x PCI Express, USB 2.0 and Ethernet along with an I2C bus. The latter can be used for low speed, system management. Power, ground and clocks could be supplied in the same connector or an additional connector. The latter may be more suitable due to cost and power requirements.

This architecture has a few things going for it. A number of low port count USB hubs are now available including at least one dual port USB hub that is ideal for providing support for the stack and a single on-board USB device. Similar devices are expected for PCI Express and Ethernet. This greatly simplifies board design.

Another feature is the ability to create an SBC that can be placed in the middle of the stack instead of only at the base. This provides a way to implement multiprocessor architecture even with a more limited architecture like USB. In this case, the mid-level SBC would need to provide a USB client interface to the lower level and take control of the upper level devices. Interconnects like Ethernet that do not have a master would be shared normally.

Interfacing to new add-on peripherals becomes relatively easy. For example, the new ExpressCard standard designed to replace PCMCIA and CompactFlash cards employ PCI Express and USB. A board that supports one or more of these small cards simply requires a hub for one or both of the interconnects along with a connector for the card. Devices ranging from flash memory to WiFi adapters will be available soon making them an interesting alternative to boards with custom adapter designs.

Finally, the reduction in bus width through the use of high speed serial interconnects would allow the board size to be even further reduced versus the existing, compact PC/104 standard. This would allow the architecture to be used in even more embedded applications.

I suspect that this design is not new although its use with technologies like USB and PCI Express may be. I would be interested in hearing if anyone has utilized this approach or if they are planning to do so in the future. Drop me an email note at [email protected].

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