Components/Interconnects/Packaging> Interconnects And Packaging

To a large extent, the consumer sector will dictate the trends in packaging and interconnection technology developments. Digital cameras with paper-thin flash-memory cards, business-card-size smart cards that carry volumes of personal information in a person's wallet, and robotic toys with electronic smarts crammed into tiny crevices are just part of the huge influx of applications pushing the envelope.

Not only will performance be crucial, but the cost factor will be enormous as well. Thus, packaging and interconnect designers must come up with robust solutions at the lowest possible cost.

A sizable hurdle involves solving capacitance, ringing, overshoot, and other effects in interconnect systems with signal speeds rocketing to tens of gigabits per second while suppressing costs via improved processing technologies. Here, it would be preferable to work with standard pc-board materials like FR-4 and copper interconnects—two mature technologies.

Last year, Tyco Electronics (www.tyco.com), along with IC manufacturer Gennum (www.gennum.com), demonstrated that FR-4 material can be improved with better processing. The company showed that Tyco's Z-Pack HM-Zd connector and a pc board working with a Gennum chip can handle serial data at 10 Gbits/s for up to 22 in. of copper using FR-4 material.

As chip densities increase, so will the need to reduce on-chip signal delays. One promising method, devised by researchers at Johns Hopkins University (www.jhu.edu), involves a hybrid integration approach that implements silicon on a synthetic sapphire substrate instead of conventional bulk silicon CMOS. It promises to accelerate on-chip signal transmissions by 100 times and reduce power consumption, as sapphire is an insulator.

Ceramics will continue to play a large role in packaging technology. Low-temperature cofired ceramic-on-metal (LTCC-M) substrates will improve thermal conductivity, featuring lower shrinkages in the x-y plane. A competitive trend is to use multilayer pc boards on BGA platforms for lower cost.

The move to more leadfree packages (no lead, pb) will accelerate. While there's no consensus yet on this issue, a clearer picture should emerge soon.

• LOOK FOR HIGH-SPEED CONNECTORS to emerge, such as Tyco's "extended performance" 30-pin surface-mount (SMT) connector referenced in the XTP standard. These connectors will meet the demands of high-speed networks like 10-Gbit Ethernet.
• "ZIPPER" TYPE CONNECTORS for flexible electronic circuitry will continue to progress. A team at NASA's Langley Research Center in Virginia is proposing that 100-mil (2.5-mm) pitches can be achieved by known fabrication techniques and that pitches of as small as 25 mils (0.6 mm) may eventually be realized.
• MEMS-BASED HEAT EXCHANGERS will become more prominent to cool high-performance microprocessors. Cooligy Inc. has made a breakthrough in this area with its microfluidic MEMS-based heat-exchanger system that uses a novel electronic pump.
• HIGH—SPEED COPPER BACKPLANE INTERCONNECTS will facilitate the transmission of multi-gigabit data rates with little or no signal degradation. SiliconPipe has shown the way with its ChannelPlane system, which can handle data rates up to 40 Gbits/s.
• FUTURISTIC CHIP-TO-CHIP INTERCONNECT TECHNIQUES will be developed to simplify the building of very high-density circuits in tiny spaces. Sun Microsystems' proximity communication project will permit hundreds of chips to be packed in a face-to-face checkerboard arrangement that's much denser than anything possible today.
• CUSTOM EDA TOOLKITS will be used in the design of silicon ICs as well as in the packages and pc boards they populate. These design kits will include sophisticated electromagnetic simulators and package design flows.
• HEAT MANAGEMENT AND REMOVAL will become a bigger concern for densely populated pc boards and backplanes. The solution to these problems will become more difficult with decreasing component sizes and increasing circuit densities.
• GREATER USE OF ELECTRONICS IN CONSUMER APPLICATIONS will lead to advances in denser and lower-cost leadframe memory cards. Last year, Amkor developed proprietary processes that enabled 50% smaller memory cards for leadframe structures.
• 3D PACKAGING TECHNOLOGIES for integrated wireless applications will enable ultra-dense stacking of memory chips for use in consumer items. Tessera's µZ Ball Stack technology allows for 3D stacking in a thin layer of up to eight memory dies.
• IMPROVED SUBSTRATE MATERIALS will elevate the performance of a wide range of ceramic and consumer products. Ziptronix's ZiROC room-temperature covalent-bond process is just one example of this kind of improvement.