Dual-Core Cortex-A9 Tackles Communication Gateway Chores

June 21, 2012
Mindspeed's dual core Arm Cortex-A9 Comcerto 2000 targets gateways and access points providing hardware acceleration like OPAL, Open Packet Acceleration Logic.

Mindspeed Technologies looks to change the low- to mid-range communication playing field with its Comcerto 2000 based on a pair of 1.2 GHz Arm Cortex-A9 cores (Fig. 1) but uses only 3.5W. Its OPAL (Open Packet Acceleration Logic) handles data stream functions like Deep Packet Inspection (DPI) usually found in higher end chips (see 48-core MIPS64 Chip Accelerates Enterprise Networks). It also includes SLIC/SLCA (Subscriber Line Interface Circuit/Subscriber Line Audio Processing Circuit) support and provides carrier class VoIP (Voice-over-IP) services making the Comcerto 2000 family ideal for high end gateways.

Figure 1. The Comcerto 2000 packs in dual 1.2 GHz Arm Cortex-A9 core and the OPAL (Open Packet Acceleration Logic) subsystem.

The Comcerto 2000 brings Software Defined Networking (SDN) to the network edge. It will be found in routers, gateways, network attached storage and security appliances needing enterprise class support. A typical platform (Fig. 2) might service an array of devices from wired and wireless networking to storage devices. The platform is designed to handling data and telephony chores. It is designed to handle the latest technologies such as IPv6 and 802.11ac multi-band radio.

Figure 2. The Comcerto 2000 can handle an array of network interfaces from wired to wireless.

The Comcerto 2000 supports ARM TrustZone as well as secure boot. It also has JTAG blocking for deployed chips to prevent software access. The chip has 64 Kbytes RAM on-board and support DDR3 and flash with ECC. OPAL has 8 Kbits OTP memory. It support three 1G Ethernet ports, USB 3 and USB 2 support plus two PCI Express Gen 2 interfaces. The two SATA ports can be extended via an external SATA bridge that could be handy since the XOR hardware supports RAID 5.

The OPAL (Open Packet Acceleration Logic) engine is designed for non-voice chores. It can support software defined networking APIs like OpenFlow. OPAL is C programmable that make proprietary lock-in less likely. It has a TCP offload engine and hardware assist for QoS. The chip is capable of handling 2 Gbit/s PPPoE/NAT with 64-byte packets and IPsec at speeds up to 2 Gbits/s. It runs at SSL at 200 Mbits/s using 1500-byte packets and handles deep packet inspection at this speed as well. DPI is primarily for routing versus some platforms that can do more extensive analysis, routing and filtering.

The chip has extensive power management featrues. The OPAL subsystem has multiple clusters that can be managed independently. Likewise, the CPU cores and other subsystems are independently managed.

The chip is pin-compatible with Mindspeed's prior generation and it is software compatible. Software support is extensive including carrier grade VoIP support with SIP stacks. There is carrier grade Linux and an custom version of OpenWRT Linux. Evaluation boards are available.

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