TI Integra
Development board
Based on a 1.5-GHz Arm Cortex-A8 core, the Texas Instruments Integra (Fig. 1) and matching Sitara lines of microcontrollers bring dual-channel, high-speed serial connections to designers. The high-speed peripheral connections include Gigabit Ethernet, USB 2.0, PCI Express Gen 2 x1, and 3-Gbit/s SATA.
The Integra includes the C674x floating-point DSP core in addition to the Cortex-A8. This combination makes the platform ideal for connected multimedia applications. A 3D graphics engine in the C6A8186 version can handle up to 27 Mpolygons/s. And, all of this performance only requires only 5 to 6 W.
The chips are likely to find a home in single-board computer platforms like the Mini-ITX, PCIe/104, and SFF-SIG SUMIT boards. The high-speed serial links make the chips candidates for routers and gateways as well as networked attached storage (NAS) devices. The graphics support enables the chips to be used in industrial automation user interfaces and point-of-sale (POS) terminals and kiosks.
Each core has its own 32-kbyte L1 cache for code and data plus a 256-kbyte L2 cache. Off-chip memory support includes dual DDR2/DDR3 controllers plus a NAND flash interface. The quad 16-channel direct memory access (DMA) controllers can handle up to 16 peripherals. Additional peripherals include SD/SDIO, three McASP/SPDIF ports, serial peripheral interface (SPI), two I2C ports, and three serial ports. The 3D graphics support can handle up to two displays. And, each core supports HDMI output.
The Eclipse-based Code Composer Studio in the EZ Software Development Kit (SDK) handles GPU and DSP development chores. The key to the Integra’s success will be the C6EZRun development tool, which is designed to simplify porting code to the DSP. This command-line tool will make it much easier to move C/C++ source from the Arm to DSP core.
In addition to C6EZRun, Texas Instruments supplies the C6EZAccel DSP software libraries, which include industry-standard wrappers that run on the Arm core for accessing the DSP codecs. Operations can be queue. The architecture is based on TI’s Codec Engine and DSPBIOS.
Pricing for the C6A816x starts at $46. The Sitara and Integra chips are pin-compatible. The MDXEVM8168 development board (Fig. 2) costs $1895.