Empower Unveils High-Density Silicon Capacitors for Co-Packaging with AI Chips

Three new silicon capacitors from Empower Semiconductor are designed to address the power-integrity demands of AI and high-performance computing (HPC) chips by being co-packaged with them.

The new series of embedded silicon capacitors, or ECAPs, consists of the EC2005P, delivering 9.34 μF of capacitance in a package measuring two square millimeters; the EC2025P, supplying 18.68 μF in a 4- × 2-mm footprint; and the EC2006P, offering 36.8 μF in a form factor of 4 × 4 mm. Empower unveiled the lineup ahead of the Chiplet Summit, where it will provide more insight into power optimization strategies using ECAPs.

Power Delivery to Placate Power Demands

As GPUs and other AI chips continue to increase in power and complexity, ensuring stable and efficient power delivery is becoming a key constraint for both chip and system designers. Traditional board‑level capacitors are increasingly failing to handle the high current densities and rapid transient responses required by these devices, said Empower. This is driving a shift to integrating capacitors directly into processor substrates.

High-performance GPUs and other AI chips in data centers are so power-hungry that they’re encircled by DC-DC converters. Positioned inches from the silicon, these devices carefully regulate voltage in the final stage of the power delivery network (PDN), which is increasingly difficult as the power needs and thermal limits of these chips are soaring.

For example, the B200 GPU based on NVIDIA’s Blackwell architecture burns through up to 1,200 W. And the company’s latest superchip, the GB200, brings together a pair of Blackwell GPUs and a Grace CPU in a single module that draws up to 2,700 W of power.

These voltage regulators tend to be supplemented by vast networks of capacitors. The AI workloads running on these chips have distinct power profiles, typically requiring sudden bursts of current when the processor leaps to full power.

These power spikes can occur in a matter of microseconds, often significantly faster than the voltage regulators can respond. If the power supply fails to supply enough current in time, the voltage on the core power rail can drop, resulting in voltage droop, which can degrade performance.

Decoupling capacitors — as many as several hundred multi-layer ceramic capacitors (MLCCs) for AI GPUs — are mounted on the opposite side of the board beneath the processor to mitigate this issue.

They serve two primary functions. First, they filter high-frequency noise to maintain a stable, low-ripple power supply. Second, they act as a local energy reservoir, delivering current to the processor to fill in gaps during load transients and prevent voltage fluctuations. Without enough decoupling, voltage undershoot or overshoot can degrade performance or overload and damage the processor.

With power demands rising above 1,000 W and core voltages dipping below 1.0 V, the latest AI chips are pulling far in excess of 1,000 A of current. Maintaining voltage stability is increasingly difficult in this situation due to parasitic resistance and inductance in the PDN.

While engineers can add more capacitors to tackle the problem, another potential solution is to place them closer to the die. Slipping the capacitors into a processor substrate reduces loop inductance and improves transient response, which helps when dealing with the dynamics of AI workloads.

Higher Capacitance Density with ECAP

Empower said its ECAP technology is designed to support this trend by offering higher capacitance density in compact packages suitable for integration at the processor level.

“Our customers are under intense pressure to deliver greater performance with tighter power margins,” said Steve Hertog, Empower’s senior vice president of global sales, in a news release. “These new ECAPs are a proven and practical way to deploy higher capacitance density into a smaller footprint right at the package level of the AI processor.”

According to Empower, the new ECAPs feature ultra-low equivalent series inductance (ESL) and equivalent series resistance (ESR). The wide bandwidth of the silicon caps, coupled with their low impedance, ensures the optimal PDN and improves overall power integrity. The company said each component has been built to meet strict volume and tolerance requirements for embedding within substrates.

Tackling Power Integrity by Using IVRs

The launch forms part of Empower’s broader push to fix one of the growing headaches in high-end chips: power integrity. In addition to ECAPs, the startup is also introducing integrated voltage regulators (IVRs).

This class of ultra-compact DC-DC converters unites power transistors, inductors, capacitors, and control into a single chip that lacks many of the drawbacks of keeping them as discrete components. They’re small enough to fit beneath server boards and accelerator cards, feeding power vertically instead of laterally to the load.

Empower, headquartered in Silicon Valley, raised $140 million in fresh funding at the end of last year to scale up production of its first IVR for vertical power delivery (VPD), dubbed Crescendo. By enabling vertical power, the startup said 20% more power can reach the processor instead of being lost as heat.

The IVRs are based on CMOS technology, which allows them to achieve “multi-megahertz” bandwidths. As a result, Crescendo supports up to 20X faster transient responses than traditional voltage regulator modules (VRMs), giving it more granular power control overall.

Empower claims Crescendo can achieve an additional 15% reduction in power used by the processor and higher processor utilization for a typical AI workload, driven by the faster voltage-droop response of its IVRs.