Agere Goes For Palladium II System

July 1, 2005
Cadence Design Systems announced that Agere Systems chose the Palladium II accelerator/emulator system after using the original Cadence Palladium system to verify and launch its TrueAdvantage converged access solutions. The increased capacity of Palladi

Cadence Design Systems announced that Agere Systems chose the Palladium II accelerator/emulator system after using the original Cadence Palladium system to verify and launch its TrueAdvantage converged access solutions. The increased capacity of Palladium II will reduce the overall functional-verification process of Agere's most complex chip designs, claims Cadence.

Agere cited the Palladium II system's high-performing multi-user capabilities, increased run-time performance, and strong debug capabilities. The overall result will enable Agere to begin verifying the hardware and software up to three months earlier in the design process—directly addressing intense time-to-market pressures.

According to Agere, the entire verification environment for the TrueAdvantage converged access solutions was up and running within two weeks. This included third-party IP, the operating system and external debuggers, and connections to external networking-test sets such as Bit-gate and Adtech.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!