Power innovations aim to become designer-friendly

Mid-power modules from Vicor, quad-output power-management units from NSC, and a new all-in-one power-management IC from Lattice all give designers more flexibility.

London's oldest restaurant, Rules, was the spot Vicor chose to launch its latest range of mid-power modules. A total of eight mid-power Maxi dc-dc converters were added to the 24Vdc input family: a 3.3Vout, 200W model and 300W models at 5, 12, 15, 24, 28, 36, and 48Vout.

The modules use the company's low-noise, zero-current and zero-voltage switching (ZCS/ZVS) topology (see Fig. 1) and are appropriate for industrial or process control, distributed power, medical, ATE, communications, defence, and aerospace applications. With switching frequencies up to 1MHz, the 24Vdc family also provides rapid transient response that's well-suited for RF applications.

What's particularly useful about the new range is that designers who don't need the full-power capability of a 24V Maxi module now have a mid-power option—with the functionality and configurability of the high power models. In addition, low-noise ZCS/ZVS reduces the design effort and filtering costs required for power converters to meet emissions requirements.

The modules, which come in RoHS-compliant models, measure 117 × 56 × 12.7mm and have a height above board of 10.9mm.

With these new models, the 24Vin Maxi family now totals 16 models in all, with output voltages from 3.3 to 48Vdc and power levels from 200 to 400W. The converters operate from 24V nominal input, with an input range of 18 to 36V. Efficiencies, says Vicor, range up to 88% for the higher output voltages.

Quad-output power management units

Also wanting to keep things designer-friendly, National Semiconductor developed two new, integrated power management units (PMUs) for its family of easy-to-use PMUs.

These are optimised to power mid-range, quad-output applications (see Fig. 2), such as low-power FPGAs, microprocessors, and digital signal processors. The LP3906 and LP3905 PMUs each feature two high-efficiency buck regulators and two ultra-low-noise, low-dropout regulators (LDOs). The high level of integration should simplify system design.

National's LP3906 PMU has a I2C-compatible interface for programmability. This provides the flexibility to use the same device for multiple solutions that require different output voltages.

Including dynamic voltage scaling with 96% conversion efficiency reduces the power consumption of the powered device, such as a microprocessor. Example applications include powering an embedded processor, in which each switching regulator can drive the core and input/output while each LDO supplies the analogue and peripheral functions.

In FPGA applications, the dual regulators power the core and I/O voltages. And the dual LDOs power the auxiliary voltages that supply the embedded peripherals, such as communication engines.

The LP3906, available in a 24-pin thermally enhanced LLP package that measures 4mm by 5mm, features two integrated 1.5A, high-efficiency buck regulators and two 300mA linear regulators with an I2C-compatible interface for programmability. The dual buck regulators have a dynamically programmable, wide-output voltage range from 0.8 to 3.5V with up to 96% efficiency.


NSC also announced its second-generation, digitally programmable LP5552 PowerWise energy-management-unit (EMU) and advanced-power-controller (APC2) intellectual-property (IP) package. The goal of the PowerWise package is to reduce power consumption in battery-powered, handheld consumer products.

National's APC2 IP pairs with the LP5552 EMU to reduce the power consumption of high-data-rate digital processors. The combination cuts frequency-scaling capability by up to 70%.

The APC2 IP is compatible with Intelligent Energy Manager (IEM) frequency-scaling technology developed by ARM Ltd. The LP5552 and APC2 comply with the PowerWise Interface (PWI) 2.0 open-industry standard introduced by the company and ARM earlier in the year.

With the LP5552, a digital processor can adaptively adjust its supply voltage to the minimum level needed. It includes two adaptive-supply-voltage buck regulators for the processor cores and five additional programmable regulators. The linear regulators power the input/output (I/O) ring, oscillator and phase-locked loops (PLLs), and embedded and external memories on low-power SoCs. They can also power other auxiliary devices in the system. The PWI 2.0 interface controls the LP5552's functions for simple interfacing to the digital processor.

Compliant with the AMBA specification, the APC2 is a synthesisable macrocell that includes a hardware performance monitor to support adaptive voltage and frequency scaling. It's actually very similar to the APC1 announced back in 2004. The APC2 automatically calibrates for process and temperature variations, and communicates with the LP5552 using the PWI 2.0 interface. In addition, the APC2 concurrently manages multiple voltages and frequency-scaled power domains on a feature-rich multiprocessor SoC, as well as bias voltages for leakage reduction with threshold scaling.

Price performer

Finally, Lattice added the programmable, low-cost ispPAC-POWR607 device to its second-generation Power Manager II product family.

The new devices achieve a sub-$1 price point in high volume and target power-management applications in consumer markets such as LCD TV, automotive multimedia systems, GPS receivers, Multimedia Terminal Adapters, and set-top boxes.

In addition, the device integrates a complete set of power-management functions that typically require multiple ICs.

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