EE Product News

Clock Timer Suits Stable, Low-Jitter Apps

Intended for tight-stability, low-jitter applications, the F1100CS high-frequency clock timer features a total stability of ±25 ppm, with ±20 ppm also available. Jitter is 5 psrms typical at 100 MHz. The device comes in an SMT package and includes a hermetically sealed crystal for predictable, long-term aging. Other features include rise and fall times of 3 ns, a duty cycle of 45%, with 55 % also available, and tri-state output. Manufactured using GEN II IC CMOS technology, the device is available in frequencies ranging from 65 to 105 MHz, with typical pricing starting at $15 each/1000.


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