Measuring key characteristics of high-speed pulses such as frequency, amplitude, and pulse width for simultaneous pulses that overlap in time has long been an issue in design. To solve that problem, engineers developed and refined the monobit receiver.
The system includes RF signal shaping and filtering functions, a latched comparator (which is a single-bit analog-to-digital converter, or ADC), a demultiplexer to interface the high-speed digital data to commercially available FPGAs, and advanced digital-signal-processing (DSP) algorithms to extract the frequency and phase information.
The high-speed latched comparator (monobit ADC) is the key enabler of the monobit receiver design. Its function is to accurately digitize the input signal at the correct times. Two of the key specs for the monobit ADC are input analog bandwidth and thermal offset voltage.
Input analog bandwidth determines the maximum signal frequency that can be sampled. It is important in a bandpass sampling configuration, where the signal frequency can be greater than the sampling frequency.
If a signal is sampled, the spectrum is replicated at every harmonic of the sampling frequency (see the figure). For example, if the spectrum is sampled at 9.2 GHz, the spectrum will repeat at 9.2-GHz intervals, out to plus and minus infinity. As a consequence, the frequency at 4 GHz is indistinguishable from the signal at +13.2 GHz, +22.4 GHz, etc. The opposite is also true—signals at +13.2 GHz and +22.4 GHz, sampled at 9.2 GHz, will appear at 4 GHz.