A dual Harvard architecture and an advanced dual multiplier/accumulator Data Computation Unit (DCU) are among the key elements of a new family of embedded DSP cores that is expected to help pave the way for further rapid growth of the low-cost consumer products market. By using newly developed R.E.A.L. (Reconfigurable Embedded Architecture Low-cost/Low-power) technology, the firm intends to produce DSP cores for "system-on-silicon" solutions that will also integrate memory, microcontrollers, peripherals, and I/O sub-systems. The new DSP cores reportedly permit block-based algorithms to be processed twice as fast as single multiplier/accumulator cores operating at the same clock frequency. In addition, each DCU processing block can be optionally controlled in parallel by 96-bit user-defined application specific instructions (ASIs), allowing designers to select an instruction set tailored to the application.
Company: PHILIPS SEMICONDUCTORS INC. - Embedded Systems Technology Center
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