PCI-X Bus Bridge Targets High-Bandwidth I/O

Nov. 9, 2004
Faster connectivity between PCI-X buses and the elimination of bottlenecks in I/O heavy systems is the goal of the P17C21P100 PCI-X to PCI-X bridge. The 2-port device supports the full 64-Bit/133 MHz specification for PCI-X and is also backwards

Faster connectivity between PCI-X buses and the elimination of bottlenecks in I/O heavy systems is the goal of the P17C21P100 PCI-X to PCI-X bridge. The 2-port device supports the full 64-Bit/133 MHz specification for PCI-X and is also backwards compatible with conventional PCI down to 32-Bit/33 MHz. Key features are dynamic prefetching control, configurable free space in the memory data FIFO and 5V tolerance in support of legacy products. The bridge supports up to six secondary bus masters. Pricing starts at $55 each/1,000. PERICOM SEMICONDUCTOR CORP., San Jose, CA. (800) 435-2336.

Company: PERICOM SEMICONDUCTOR CORP.

Product URL: Click here for more information

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