Xilinx FPGAS Integrate PCIe Blocks

Oct. 8, 2008
Recent additions to the Virtex-5 field programmable gate array (FPGA) platform, the LX30T, LX50T, and LX110T, embark as the first FPGAs to integrate hard-coded PCI Express endpoints and tri-mode Ethernet MAC blocks. The LXT devices build on the 65-nm

Recent additions to the Virtex-5 field programmable gate array (FPGA) platform, the LX30T, LX50T, and LX110T, embark as the first FPGAs to integrate hard-coded PCI Express endpoints and tri-mode Ethernet MAC blocks. The LXT devices build on the 65-nm Virtex-5 platform with ExpressFabric technology, an ASMBL architecture, and triple-oxide technology. Their hardened PCI Express cores promise savings up to 10,000 LUTs and 2W of power when compared to soft IP core devices. They feature up to 24 RocketIO transceivers operating from 100 Mb/s to 3.2 Gb/s while typically consuming less than 100 mW per transceiver/receiver pair. The transceivers support a range of industry standards including PCI Express, Gigabit Ethernet, XAUI, SONET/SDH, CPRI and OBSAI, Serial RapidIO, HD-SDI, and Fibre Channel. Providing an off-the-shelf design approach, the LXT platform offers software, IP cores, reference designs, development kits, characterization reports, protocol compliance certification, collateral, and design support. With volume-production timeframes in 2008, prices for the LX30T, LX50T, and LX110T are $109, $189, and $529 each/1,000, respectively. XILINX INC., San Jose, CA. (408) 559-7778.

Company: XILINX INC.

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