Electronic Design

Packaging: DRAM Stacking Technology Enables High-Density Modules

Based on chip-scale packaging (CSP), a new lead-free DRAM stacking technology enables the design and manufacture of cost-effective, high-density DRAM modules for large servers, telecom switches, and storage applications. The standard-height (1.2-in.) 184-pin registered dual-inline memory module (RDIMM) portion of the product line consists of double-data-rate (DDR) modules in 1-, 2-, and 4-Gbyte densities. These DDR modules are manufactured with 512-Mbyte DRAM components. The proprietary CSP technology incorporated in these high-density modules exhibits better electrical and thermal performance than the conventional TSOP packaging typically used for DRAMs. Simple flip-chip construction reduces stray impedances, which creates greater operating margins for the modules' electrical timing parameters. The DRAM stacking technology will be available in the second half of this year. Contact the company for pricing and additional information.

Viking InterWorks, a Sanmina-SCI Co.

TAGS: Components
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