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Low-Power Embedded DRAM Sets Sights On SoC Designs

Targeting system-on-a-chip (SoC) applications, the company’s latest embedded DRAM operates at 1.2V and features a typical random access speed of up to 314 MHz with one clock latency and a typical page-mode access speed of 595 MHz. The memory is available in 8 Mb and 9 Mb hard macro cores and routable configurable macro cores. A proprietary 0.13 µm, low-k dielectric embedded DRAM copper process makes the devices fully compatible with the company’s standard CMOS process. The process employs both a cylindrical-type stacked capacitor structure that promises high yields and a low-temperature metal-insulated-metal (MIM) capacitor process that is said to accelerate performance. Two devices are available. The CB-12 operates at 1.5V and at speeds up to 222 MHz typical in random access mode with one clock latency. The CB-130 operates at 1.2 volts and up to 314 MHz typical in random access mode with one clock latency. For further information and prices, contact NEC ELECTRONICS INC., Santa Clara, CA. (408) 588-6000.


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TAGS: Digital ICs
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