EE Product News

SSRAM Eliminates Bus Latency

Currently offered in speeds ranging from 150 to 225 MHz, this 72-Mb pipeline, no bus latency (NBL) SSRAM comes in a 14 mm x 22 mm, 119-ball BGA package suited for use in increasing the memory and memory performance demands of datacomm/ telecomm systems, such as terabit edge switches and routers. The JEDEC-pin-compatible, synchronous NBL, 2M x 36, 2.5V device is designed to sustain 100% duty cycle (bus bandwidth) operation by eliminating the turnaround cycles when transition occurs between functional modes of memory device read/write, write/read operation. And all inputs, with exception of an asynchronous output enable, are synchronized to the rising edge of the input clock and write operations are internally self-timed. This eliminates complex off-chip write pulse generation and provides increased timing flexibility. The 2M x 36 pipeline NBL is priced at $240 each/1,000. For more details, contact Dave Harrison at WHITE ELECTRONIC DESIGNS CORP., Westborough, MA. (508) 366-5151.


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TAGS: Digital ICs
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