This article appeared in Microwaves & RF and has been published here with permission.
This article is part of our Design Automation Conference 2023 coverage.
True Circuits (TCI) has long made use of its JSPICE simulation and design environment to create its general-purpose analog and synthesizable phase-locked-loop (PLL) and delay-locked-loop (DLL) intellectual property (IP). To mark its 25th year of operation, the JSPICE software is being made available to the public through a beta test in preparation for a commercial release.
As TCI began in 1988, it started with a family of standardized timing IP to cover a variety of chip applications, offering customization to address existing legacy requirements. At that time, the company decided to develop many of its own CAD tools to eventually automate all aspects of the design flow.
The result, as it stands today, is the JSPICE environment, which supports many IP design types (PLLs, DLLs, and DDR PHYs), all major foundries, and most IDM processes and process variants, as well as hundreds of semiconductor customers and design partners from 250 to 4 nm. JSPICE greatly simplifies and speeds up the process of designing and characterizing complex analog and digital circuits by dramatically facilitating and enhancing the process of running simulations and interpreting their results.
For more information, visit the company's website
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