What you'll learn:
- What is Keysight’s Chiplet PHY Designer?
- Major tool features of the platform.
Keysight’s Chiplet PHY Designer is designed to model and analyze chiplet connectivity for Die-to-Die PHY (D2D) chiplet packaged systems from the transmitter to the receiver. Tim Wang Lee, Signal Integrity Application Scientist at Keysight, provides a quick overview in the video above.
Chiplet PHY Designer includes the Chiplet PHY Simulator, Via Designer, Controlled Impedance Line Designer (CILD), and EM Design. The system also works with Keysight’s UCIe simulator that’s included with the bundle. It allows measurement of the interface’s voltage transfer function (VTF) and the ability to analyze forward clocking configurations. In addition, the VTF support deals with crosstalk and VTF loss.
The Designer can handle the forwarded Quad Date Rate (QDR) clocking architecture specified by UCIe. It’s able to create IBIS-AMI models for the PHY’s transmitter and receiver.
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About the Author
William G. Wong
Senior Content Director - Electronic Design and Microwaves & RF
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