eGaN® FET- Silicon Power Shoot-Out Volume 8: Envelope Tracking

Envelope tracking (ET) for radio frequency (RF) amplifiers is not new. But with the ever increasing need for improved cell phone battery life, better base station energy efficiency, and more output power from very costly RF transmitters, the need for improving the RF Power Amplifier (PA) system efficiency through ET has become an intense topic of research and development. There are many papers on the basics and advantages of envelope tracking ^[1-6]. The key to their ability to improve efficiency lies in the PA’s peak to average power (PAPR) requirements ^[3]. As shown in Fig. 1, it is possible to achieve peak PA efficiencies as high as 65% with a fixed supply, but given PAPRs as high as 10, the average efficiency is likely to be lower than 25%. Through modulation of the PA supply voltage, this can be improved to over 50% - essentially doubling the efficiency and reducing PA losses by two thirds! This will not only reduce power consumption, but also lower the cost of operation, cooling requirements, size etc. ^[7].

But how to generate the required fast moving supply voltage, the bandwidth of which can be in the tens of megahertz range ^[3]? A variety of different approaches have been investigated to achieve this. One such method would be implemented through the use of a hybrid linear-amplifier and multi-phase buck converter as shown in Fig. 2 ^[8], where the buck converter supplies only the high-power, but lower-frequency transient components. Alternative methods employing boost converters ^[9] or Class-S amplifiers have also been discussed. Regardless of the implementation, Gallium nitride is being seen an as enabling technology for both ET converters and wide bandwidth RFPA designs.

Implementing a multi-phase buck converter would traditionally require switching frequencies 5-10 times higher than the required ET bandwidth, but research into raising the converter’s effective bandwidth through hybrid solutions ^[8] and/or non-linear control ^[10] allows the required buck converter switching frequency to be greatly reduced. Even so, a large number of interleaved phases may still be required to achieve acceptable efficiency and bandwidth. We will show what power and efficiency levels are readily realizable using current eGaN FETs and the LM5113 eGaN FET half-bridge driver ^[11].

Experimental Setup

The high PAPR requirements that make ET possible also means that average output voltage is typically between 30% to 50% of the buck converter supply voltage with short duration excursions below and above this average. Thus, for demonstration purposes, a steady state buck converter running at a similar duty cycle can be used to determine the efficiency and thermal requirements of a multi-phase ET buck converter. This can be further simplified by evaluating a single phase as all phases are identical. The experimental setup specifications are listed in Table 1 with a diagrammatic representation of the setup shown in Fig. 3. These specifications are representative of the requirements of a high power ET buck switcher for use in HV LDMOS based Digital Video Broadcasting (DVB) transmitters, such as that implemented by ET specialist Nujira. The estimated power loss breakdown also for each component at full power including conduction losses within the PCB is also shown in Fig. 3.

Standard EPC9002 or EPC9006 development boards ^{[12, 13]} were used as a starting point to generate all the results in this article. These boards were selected due to the 100V capability and ease of implementation. The respective operating frequencies were chosen based on their relative die sizes. To improve the thermal performance of the standard development boards, a 15 mm square and 9.5 mm tall finned heat sink was added above the eGaN FETs (Fig. 4). The heat sink datasheet states a thermal impedance of ~12 °C/W at 200 LFM. The heat sink was attached to the board using Gap Pad® GP 1500 (60 mil thick) ^[14] over half the heat sink area, while the area covering the eGaN FETs was filled using two layers of Sarcon 30x-m ^[15]. The heat sink was offset to barely cover the eGaN FETs such that the temperature of the PCB directly adjacent to the devices could be measured using a thermal infrared (IR) camera. The output inductor and output capacitors were added to the bottom of the respective development boards, using an insulating polyimide layer covered with adhesive copper tape to form the output connection. The gating signal was supplied open loop using an HP8012B pulse generator. An active load was added and swept from zero to full load. The efficiency was measured using the Kelvin sense points on the development boards and additional Kelvin points at the output capacitors. The input voltage and duty cycle was adjusted at each measurement point.

Inductor Losses

Efficiency results for both converters are shown in Fig. 5. This includes driver losses of about 100mW in both cases. Initial thermal results for the EPC9002 development board showed excessive heating of the PCB due to the losses in the chosen output inductor flowing into the PCB. To lower the PCB temperature, the inductor was elevated away from the board. At full load, the peak inductor temperature reached ~90 °C. Thermal images of both boards running full load are shown in Fig. 6. An estimation of the junction temperature and thermal power flow can be made by noting the full load power loss and PCB temperature and estimating the component losses. The device thermal characteristics are taken from ^[16]. The resultant thermal diagrams and equivalent thermal networks are shown in Fig. 7 and Fig. 8, respectively.

The results presented have not been optimized and future improvements are possible. Three suggested areas for future improvements in efficiency are:

Improved inductor selection
Improved thermal design – thinner layer of thermal interface material, thicker PCB copper and multiple phases mounted on low thermal impedance heat sink.
Reduce peak device temperature by reducing low-side device size to reduce high-side Q_OSS losses

Nevertheless, the results presented show that building a buck converter for high power envelope tracking applications such as base stations is viable using eGaN FETs. The actual power level and number of phases required will depend on the power level and bandwidth requirements of the specific application. Over 97% efficiency was achieved at 1 MHz and over 94% efficiency was achieved at 4 MHz.

References

[1] Gerard Wimpenny, Understand and characterize envelope-tracking power amplifiers
[2] Shaun Cummins, Addressing the Battlefield Communications Power Gap
[3] OpenET alliance, Introduction to envelope tracking
[4] Steven Baker, Applying Envelope Tracking to High-Efficiency Power Amplifiers for Handset and Infrastructure Transmitters, Cambridge Wireless Radio SIG, 14 July 2011
[5] Application Report, GC5325 Envelope Tracking
[6]University of Colorado at Boulder course notes - ECEN5014, chapter 12
[7] Jeremy Hendy, Transmitter power efficiency
[8] V. Yousefzadeh, et. Al, Efficiency optimization in linear-assisted switching power converters for envelope tracking in RF power amplifiers, ISCAS 2005
[9] Nicolas Le Gallou, et. al, Over 10MHz Bandwidth Envelope-Tracking DC/DC converter for Flexible High Power GaN Amplifiers
[10] Mark Norris and Dragan Maksimovic, 10 MHz Large Signal Bandwidth, 95% Efficient Power Supply for 3G-4G Cell Phone Base Stations, Applied Power Electronics Conference (APEC) 2012, Feb. 2012, Orlando, Florida.
[11] National LM5113 eGaN FET half-bridge driver from Texas Instruments
[12] EPC9002 development board
[13] EPC9006 development board
[14] Bergquist Gappad GP 1500 thermal interface material
[15] Fujipoly Sarcon 30X-m thermal interface material
[16] John Worman, Thermal Performance of EPC eGaN FETs