Alpha and Omega Semiconductor (AOS) introduced a new 80-V MOSFET in a vertical stacked-die package that helps deliver high-density designs for various power-conversion applications, ranging from AI data centers to cordless power tools.

Instead of placing separate high- and low-side MOSFETs on the PCB, the AOPL66801 integrates them into a single package, forming a full half-bridge on a chip. The AmpStack package uses vertically stacked die technology to integrate both MOSFETs in a single DFN package measuring only 5 × 6 mm, increasing power density and saving space compared to a solution using two discrete DFN5×6 MOSFETs, said Peter H. Wilson, senior director of MOSFET products at AOS.

AOS highlighted the fact that AmpStack tackles one of the constant problems in power conversion: parasitic inductance. By integrating both sides of the half-bridge in one package, the vertically stacked MOSFET can reduce parasitic inductance usually on the PCB. In turn, that reduces phase-node voltage ringing and electrical stress on the transistors. AOS also improved the clip design for the switch node connecting the two MOSFETs, reducing inductance not only outside the package, but inside it as well.

Lower parasitic inductance produces cleaner switching waveforms, enabling higher switching frequencies or improved efficiency while reducing the need for snubber circuits to suppress voltage ringing, said AOS.

With a high-side switch that can manage more than 300 A of current and a low-side switch that can handle 215 A, the AOPL66801 is aimed at synchronous buck converters or other high-current power-conversion stages that depend on half-bridges, including those in AI server power supplies. While its lack of parasitic inductance reduces switching losses, it also comes with a maximum on-resistance (RDS(on)) of 1.8 mΩ at a gate drive voltage of 10 V to limit conduction losses.

Wilson said the vertically stacked half-bridge is not only a boost for power density, but also for reliability and robustness. In a PCB layout, parasitic inductance can degrade gate-drive performance and erode switching speeds. The AmpStack also integrates a Kelvin-source sense pin, enabling a more stable gate voltage at fast switching frequencies while providing a cleaner drive path for the high-side transistor, reducing switching losses.

According to AOS, the n-channel MOSFET is equally capable of handling the heat that comes with faster switching speeds. The new chip has a maximum junction temperature of 175°C, which helps when deployed inside densely packed power supplies.

“By designing the package with low source parasitic inductance, we've drastically reduced phase-node ringing and MOSFET stress,” said Wilson. “Customers don't just get more power — they get significantly higher application reliability.”

The AOPL66801 is in full production. The unit price in 1,000-piece quantities is $6.16.