LVDS Clock Distributor Touts 50–ps Skew

Designed to distribute clock signals within datacomm and telecomm systems, the DS92CK16 chip is used to translate one bus low-voltage differential signaling (BLVDS) input signal into six TTL-compatible output signals for adjacent chips on the same board. The LVDS clock distribution chip is also capable of driving the BLVDS backplane with the clock signal.Other features of this 100-MHz, six-channel clock driver include a channel-to-channel skew of only 50 ps, power dissipation of just 30 mW (typ.), and low EMI and high noise immunity specs. The 24-lead TSSOP requires a 3.3V supply.