Arm

As software becomes a bigger battleground under the hood, Arm said its Zena compute subsystem could shave as much as a year off automotive AI chip development.

The new standard will enable companies to design custom chiplets within a shared interconnect ecosystem.

The MIPS P8700 RISC-V core, which implements a RISC-V ISA, aims at ASIL B and ISO 26262 functional safety.

Arm Cortex-M0+—a reliable architecture with low-power needs—provides 32-bit capabilities in a compact and efficient form factor.

The combination of X925, A725, and A520 cores, Arm’s most powerful mobile CPU cluster for AI to date, brings 46% better performance than CPU clusters based on the Cortex-X4 released...

Microcontrollers and other small systems are the latest to embrace AI, and hardware vendors are leading the charge with fresh innovations.

The Cortex-M52 forms a family with the M85 and M55, all of which are based on Arm’s Helium technology.

The CSS significantly reduces SoC engineering overhead for faster time-to-market.

Arm’s Total Compute Solution (TCS23) incorporates the latest Cortex-X4 core as well as a GPU and network fabric.

The effort will help ensure Arm’s mobile chip designs are compatible with Intel’s future process nodes.