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More Info on Arteris IP

Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration technology enables SoC creation success with proven flexibility and ease for a variety of applications and markets including AI, automotive, communications, consumer electronics, enterprise computing, and industrial. Arteris technology ensures higher product performance with lower power consumption and faster time to market, delivering better SoC economics for its global customer base including semiconductor manufacturers, OEMs, hyperscale system houses, semiconductor design houses and other producers of electronic systems.

The Arteris product line is silicon-proven, supporting SoC innovation from creation to integration.

Network-on-Chip IP Products

Non-coherent NoC IP, with FlexNoC and FlexWay
Cache-coherent NoC IP, with Ncore
Last-level Cache, with CodaCache

SoC Integration Products

SoC integration with Magillem Connectivity, Magillem Registers, and CSRCompiler

Videos

EDA

What’s the Difference Between Soft NoC Tiling and Hard Tiling?

Arteris’s FlexNoC supports soft tiling that’s targeted at AI and multicore chips.

EDA

Physically Aware Network-on-Chip Streamlines SoC Design Cycle

The NoC IP configuration tool developed by Arteris IP is designed to optimize layouts while cutting design time.

QuickChat: Track Design Changes To Meet ISO 26262 Functional Safety and Other Standards

Bill Wong and Paul Graykowski discuss Harmony Trace which enables design teams to monitor impacts to requirements of complex SoCs by creating and maintaining traceability between...

Podcasts

Inside Electronics

All About NoCs

Inside Electronics

A network-on-chip is an indispensable part of a system-on-chip. Editor Bill Wong talks with Arteris’ Andy Nightingale about the intricacies of NoC technology.

News

Security

Arm to Adopt Arteris Hardware Security in More CPUs

By identifying potential issues early, Arteris’ technology aims to reduce chip-level vulnerabilities that can be too difficult to fix after the device is fabricated.

Articles

EDA

The Missing Layer in AI Systems Design is Predictable, Scalable Data Movement

As AI systems scale, moving data predictably through the fabric is becoming just as important as compute and memory.

Embedded

Bridging the Gap to Chiplet Interoperability

The move to multi-die integration brings both promise and complexity. Scalable interconnects and automation are emerging as key enablers of future designs.

EDA

Speeding the Process of Building IPs, Chiplets, and SoCs

Design teams are under pressure to integrate more functionality in less time. Structured metadata and automation help manage complexity across multiple abstraction levels.

EDA

Arteris Bridges Hardware-Software Gap with New EDA Tool

Magillem Registers is all about speeding up the design of hardware-software interfaces in complex, large-scale SoCs.

EDA

Breaking Barriers in SoC Design with Smart NoC Automation

As SoCs grow in complexity, manual NoC generation is no longer practical. This article highlights how automated NoC generation streamlines interconnect development to improve ...

EDA

AI Automation Builds Better NoCs

Arteris’s FlexNoC uses artificial intelligence to create more efficient network-on-chip configurations.

EDA

Adding Cache to IPs and SoCs

Integrating cache memory into SoCs and IP blocks improves their performance and efficiency. This article highlights technologies and strategies to address challenges like cache...

EDA

Functional Safety for Control and Status Registers

How to navigate the complexities of building functional safety into SoC design, including managing IP blocks, CSRs, and adhering to standards like ISO 26262.

EDA

Certified Cache-Coherent Interconnect Supports Safety Applications

The Ncore network-on-chip design tool developed by Arteris delivers ISO 26262 certification.

EDA

Navigating the Hardware-Software Interface in Chip Design

Arteris IP Categories

Companies

Buyer’s Guide Listing Information

Click here for listing information and directions on how to add or update your company.

Additional content from Arteris IP

Embedded

Optimize SoC Design with a Network-on-Chip Strategy

Utilizing physically aware interconnect IP from trusted third-party vendors can reduce design time and increase productivity.

Computer-Aided Design

NoC IP Merges with SoC Integration Automation Software

At DAC, Arteris featured its system IP, which includes its network-on-chip interconnect IP and system-on-chip integration automation software to help boost product performance...

Embedded

Making ISO 26262 Traceability Practical

Increase system quality and accelerate functional-safety assessments by identifying and fixing the traceability gaps between disparate systems.