RISC-V CPU/NPU Combo Delivers Low Power AI Edge Computing

SiFive's Performance P870 RISC-V CPU and Intelligence X30 NPU cores bring low power, high performance AI acceleration to edge applications.

The P870 brings a 50% peak single thread performance upgrade (specINT2k6) over the previous generation SiFive Performance processors. The architecture includes a six-wide out-of-order core, that meets RVA 23 and offers a shared cluster cache enabling up to a 32-core cluster. It is compatible with Google’s platform requirements for Android on RISC-V.

The P870 also supports 128 bit VLEN RVV, vector crypto and hypervisor extensions, IOMMU and AIA plus a non-inclusive L3 cache. It incorporates SiFive's RISC-V WorldGuard security.

The SiFive Intelligence X390 NPU is a step up from the prior X280. The new X390 brings a four times improvement to vector computation. It also doubles the vector length and provides a pair of vector ALUs. This quadruples the amount of sustained data bandwidth available to the programmer.

The X390 supports the Vector Coprocessor Interface eXtension (VCIX) with 1024-b inputs and 2048-b outputs. This allows designers to add their own vector instructions as well as additional acceleration hardware. It features 1024-b VLEN vectors, 512-bit DLEN with single or dual vector ALUs.

“SiFive is leading the industry into a new era of high-performance RISC-V innovation, and closing the gap with other instruction set architectures with our unparalleled portfolio, while recent silicon tape-outs are demonstrating the tremendous benefits of SiFive RISC-V solutions,” said Patrick Little, SiFive Chairman, President and CEO.