In our last article, we provided an overview of the design considerations when developing a reliable timing system. Notably, this revolved around the crucial decision made between selecting crystal oscillators and clock generators. Now we’ll dig into this discussion deeper, exploring clock trees, jitter budgets, and how to select a clock generator for a given design.
Modern applications are built around high-bandwidth, multicore processors, and field-programmable gate arrays (FPGAs), which often have stringent timing requirements and jitter budgets. Given the frequency diversity of these applications, the choice between an oscillator and an integrated clock becomes much more straightforward.