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Hex-Switch Decoder Uses Weighted-Capacitor Network to Reduce I/O Pin Count (.PDF Download)

May 24, 2017
Hex-Switch Decoder Uses Weighted-Capacitor Network to Reduce I/O Pin Count (.PDF Download)

A pulse-width-modulated (PWM) signal and the RC-charging characteristics of a weighted-capacitor network can be used along with a CMOS Schmitt inverter to generate a pulse whose width is linearly proportional to the 16 combinations of a hex (thumbwheel) switch. The decoding is implemented using the Arduino Uno and requires only two pins (OCRA and INT0), leaving all of the other pins free for alternate functions.

The theory, which is the basis for this design idea, is the well-known capacitor-charging equation:

Vt = V(1 ‒ e‒t/RC)

Time T required to reach a voltage k × V is given by:

T = RCln[1/(1 ‒ k)]

which shows a linear relationship with C for a fixed value of R.

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