Electronic Design

EDA News

Verilog 2001 support and an assertions manager are incorporated in Aldec's Riviera 2004.04 verification tool. The new assertions manager supports OpenVera and Property Specification Language assertions. Pricing starts at $12,450. Download a free evaluation copy at www.aldec.com/riviera.

A SYSTEM-LEVEL APPROACH TO ARM-BASED DESIGN has sprung from a partnership between ARM and Synopsys. The pair integrated ARM RealView Model Library SystemC processor models with Synopsys' System Studio system-level design tool. Developers can create and analyze SystemC versions of AMBA-based SoCs more quickly and easily using System Studio as they optimize their SoC architectures. Go to www.arm.com or www.synopsys.com.

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